[PATCH] D131049: [X86] Using `X86MemOperand` instead of `Operand` for `i32mem_TC` and `i64mem_TC`
LiuChen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 3 01:18:09 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG5bbb0a831fe5: [X86] Using `X86MemOperand` instead of `Operand` for `i32mem_TC` and `i64mem_TC` (authored by LiuChen3).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D131049/new/
https://reviews.llvm.org/D131049
Files:
llvm/lib/Target/X86/X86InstrInfo.td
Index: llvm/lib/Target/X86/X86InstrInfo.td
===================================================================
--- llvm/lib/Target/X86/X86InstrInfo.td
+++ llvm/lib/Target/X86/X86InstrInfo.td
@@ -463,23 +463,17 @@
// Special i32mem for addresses of load folding tail calls. These are not
// allowed to use callee-saved registers since they must be scheduled
// after callee-saved register are popped.
-def i32mem_TC : Operand<i32> {
- let PrintMethod = "printdwordmem";
+def i32mem_TC : X86MemOperand<"printdwordmem", X86Mem32AsmOperand, 32> {
let MIOperandInfo = (ops ptr_rc_tailcall, i8imm, ptr_rc_tailcall,
i32imm, SEGMENT_REG);
- let ParserMatchClass = X86Mem32AsmOperand;
- let OperandType = "OPERAND_MEMORY";
}
// Special i64mem for addresses of load folding tail calls. These are not
// allowed to use callee-saved registers since they must be scheduled
// after callee-saved register are popped.
-def i64mem_TC : Operand<i64> {
- let PrintMethod = "printqwordmem";
+def i64mem_TC : X86MemOperand<"printqwordmem", X86Mem64AsmOperand, 64> {
let MIOperandInfo = (ops ptr_rc_tailcall, i8imm,
ptr_rc_tailcall, i32imm, SEGMENT_REG);
- let ParserMatchClass = X86Mem64AsmOperand;
- let OperandType = "OPERAND_MEMORY";
}
// Special parser to detect 16-bit mode to select 16-bit displacement.
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