[PATCH] D130397: [RISCV] Custom type legalize i32 loads by sign extending.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 449494.
craig.topper added a comment.
Herald added a subscriber: ecnelises.

Add a small DAGCombiner change that recovers va-arg-24.c I'll write a test
before I commit this. Wanted to get this out for further evaluation on other
tests Alex saw.

We might consider supporting isTruncateFree true for i64->i32 with RV64.
W instructions make it free in a lot of cases.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130397/new/

https://reviews.llvm.org/D130397

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/sextw-removal.ll
  llvm/test/CodeGen/RISCV/vec3-setcc-crash.ll

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