[PATCH] D130932: [MIPS] Expose the ZERO register as a constant physical register

Guozhi Wei via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 2 10:06:57 PDT 2022


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG85a6dd50adb2: [MIPS] Expose the ZERO register as a constant physical register (authored by Carrot).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130932/new/

https://reviews.llvm.org/D130932

Files:
  llvm/lib/Target/Mips/MipsRegisterInfo.cpp
  llvm/lib/Target/Mips/MipsRegisterInfo.h


Index: llvm/lib/Target/Mips/MipsRegisterInfo.h
===================================================================
--- llvm/lib/Target/Mips/MipsRegisterInfo.h
+++ llvm/lib/Target/Mips/MipsRegisterInfo.h
@@ -69,6 +69,8 @@
   /// Debug information queries.
   Register getFrameRegister(const MachineFunction &MF) const override;
 
+  bool isConstantPhysReg(MCRegister PhysReg) const override;
+
   /// Return GPR register class.
   virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
 
Index: llvm/lib/Target/Mips/MipsRegisterInfo.cpp
===================================================================
--- llvm/lib/Target/Mips/MipsRegisterInfo.cpp
+++ llvm/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -318,3 +318,7 @@
   // sized objects.
   return MF.getRegInfo().canReserveReg(BP);
 }
+
+bool MipsRegisterInfo::isConstantPhysReg(MCRegister PhysReg) const {
+  return PhysReg == Mips::ZERO_64 || PhysReg == Mips::ZERO;
+}


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