[PATCH] D130932: [MIPS] Expose the ZERO register as a constant physical register

[Guozhi Wei via Phabricator via llvm-commits]

Carrot added a comment.

In D130932#3691969 <https://reviews.llvm.org/D130932#3691969>, @MaskRay wrote:

> It seems not so easy to construct a test. I've tried
>
>   declare i64 @llvm.read_register.i64(metadata)
>    
>   define i64 @get_gp() {
>     %1 = call i64 @llvm.read_register.i64(metadata !0)
>     %2 = call i64 @llvm.read_register.i64(metadata !0)
>     %sub = sub i64 %1, %2
>     ret i64 %sub
>   }
>    
>   !0 = !{!"$28"}
>
> which doesn't have benefit in another target which has implemented isConstantPhysReg.

Because TargetRegisterInfo::isConstantPhysReg is rarely used directly. People usually call MachineRegisterInfo::isConstantPhysReg which calls TargetRegisterInfo::isConstantPhysReg again. Even TargetRegisterInfo::isConstantPhysReg returns false for Mips::ZERO_64, MachineRegisterInfo::isConstantPhysReg still checks if there is any definition of Mips::ZERO_64, and returns true if there is no def for it. So it's difficult to write a test for it.

I encountered a test case benefited from this patch when I worked on https://reviews.llvm.org/D130919.


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https://reviews.llvm.org/D130932