[PATCH] D130947: TableGen: Introduce generated getSubRegisterClass function
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 2 03:19:01 PDT 2022
foad added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp:280
- SrcRC = TRI->getSubRegClass(SrcRC, SrcSubReg);
+ if (SrcSubReg)
+ SrcRC = TRI->getSubRegisterClass(SrcRC, SrcSubReg);
----------------
Why add this "if", given that the generated method handles the NoSubregister case?
================
Comment at: llvm/utils/TableGen/RegisterInfoEmitter.cpp:1554
+ // sentinel.
+ if (RegisterClasses.size() < UINT8_MAX)
+ OS << " static const uint8_t Table[";
----------------
I know this is copied from above but it should be `<=` not `<`.
================
Comment at: llvm/utils/TableGen/RegisterInfoEmitter.cpp:1589
+ OS << " };\n assert(RC && \"Missing regclass\");\n"
+ << " if (!Idx) return RC;\n --Idx;\n"
+ << " assert(Idx < " << SubRegIndicesSize << " && \"Bad subreg\");\n"
----------------
This looks like you are handling the NoSubregister case.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D130947/new/
https://reviews.llvm.org/D130947
More information about the llvm-commits
mailing list