[PATCH] D130947: TableGen: Introduce generated getSubRegisterClass function

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: qcolombet, MatzeB, AMDGPU.
Herald added subscribers: kosarev, foad, kerbowa, hiraditya, tpr, nhaehnle, jvesely.
Herald added a project: All.
arsenm requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.

Currently there isn't a generic way to get a smaller register class
that can be produced from a subregister of a larger class. Replaces a
manually implemented version for AMDGPU. This will be used to improve
subregister support in the allocator.


https://reviews.llvm.org/D130947

Files:
  llvm/include/llvm/CodeGen/TargetRegisterInfo.h
  llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
  llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.h
  llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
  llvm/utils/TableGen/RegisterInfoEmitter.cpp

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