[PATCH] D130075: [InstCombine] Try not to demand low order bits for Add
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 1 05:43:39 PDT 2022
foad added a comment.
Ping! The immediate motivation for this is to avoid D130080 <https://reviews.llvm.org/D130080> (already accepted) causing this regression:
diff --git a/llvm/test/Transforms/InstCombine/cast.ll b/llvm/test/Transforms/InstCombine/cast.ll
index 3fafbd69e032..ec17b24f4c2a 100644
--- a/llvm/test/Transforms/InstCombine/cast.ll
+++ b/llvm/test/Transforms/InstCombine/cast.ll
@@ -680,18 +680,19 @@ define i64 @test49(i64 %A) {
%C = or i32 %B, 1
%D = sext i32 %C to i64
ret i64 %D
}
define i64 @test50(i64 %x) {
; ALL-LABEL: @test50(
; ALL-NEXT: [[TMP1:%.*]] = shl i64 [[X:%.*]], 30
-; ALL-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], -4294967296
-; ALL-NEXT: [[E:%.*]] = ashr i64 [[TMP2]], 32
+; ALL-NEXT: [[D:%.*]] = and i64 [[TMP1]], -4294967296
+; ALL-NEXT: [[SEXT:%.*]] = add i64 [[D]], -4294967296
+; ALL-NEXT: [[E:%.*]] = ashr exact i64 [[SEXT]], 32
; ALL-NEXT: ret i64 [[E]]
;
%a = lshr i64 %x, 2
%B = trunc i64 %a to i32
%D = add i32 %B, -1
%E = sext i32 %D to i64
ret i64 %E
}
The current patch fixes it by noticing that the "and" is redundant because it only affects bits that are not demanded by the "add".
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D130075/new/
https://reviews.llvm.org/D130075
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