[PATCH] D130560: [RISCV] Handle register spill in branch relaxation

[Aditya Kumar via Phabricator via llvm-commits]

hiraditya added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:1076
+  // Far branches over 20-bit offset require a spill slot for scratch register.
+  if (!isInt<20>(EstimateFunctionSizeInBytes(MF, *TII))) {
+    int FI = MFI.CreateStackObject(RegInfo->getSpillSize(*RC),
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Can we make an API like `isFarBranch` or something like it? Other places can reuse it possibly.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D130560/new/

https://reviews.llvm.org/D130560