[PATCH] D130677: [AMDGPU] Fix DGEMM hazard for GFX90a

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPU.td:282
 
+def FeatureDGEMMVALUWriteMemOpBug : SubtargetFeature<"dgemm-valu-write-mem-op-bug",
+  "HasDGEMMVALUWriteMemOpBug",
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I do not believe it deserves a feature bit. These bits are limited.


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Comment at: llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp:2545
+    auto NextMI = std::next(MI.getIterator());
+    if (NextMI == MI.getParent()->end() || !isDGEMM(NextMI->getOpcode()))
+      return false;
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There can be a block with fallthrough, and the next block may start with DGEMM. This check for MBB->end() does not work in this case.


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Comment at: llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp:2551
+
+  for (const MachineOperand &Use : MI->uses()) {
+    if (!Use.isReg() || !TRI.isVectorRegister(MF.getRegInfo(), Use.getReg()))
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There is already a loop across uses above at line 2317, you could just add the check there.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130677/new/

https://reviews.llvm.org/D130677