[PATCH] D130700: [AArch64][DAGCombine] Add pushSignExtendThroughExtractSubvector

[Peter Waller via Phabricator via llvm-commits]

peterwaller-arm updated this revision to Diff 448355.
peterwaller-arm added a comment.

- Stylistic changes to shrink the code a little.
- Add check for signext_inreg type.
- Update tests.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130700/new/

https://reviews.llvm.org/D130700

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-stores.ll
  llvm/test/CodeGen/AArch64/vector-fcvt.ll

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