[PATCH] D77804: [DAG] Enable ISD::SRL SimplifyMultipleUseDemandedBits handling inside SimplifyDemandedBits

[Sanjay Patel via Phabricator via llvm-commits]

spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

x86 diffs LGTM



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Comment at: llvm/test/CodeGen/X86/ins_subreg_coalesce-1.ll:8
 ; CHECK-NEXT:    movzwl 0, %eax
-; CHECK-NEXT:    orl $2, %eax
-; CHECK-NEXT:    movw %ax, 0
+; CHECK-NEXT:    movl %eax, %ecx
+; CHECK-NEXT:    orl $2, %ecx
----------------
Not sure if this test still models some situation that we care about, but you could put a TODO note on it (don't need to copy to %ecx?).


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D77804/new/

https://reviews.llvm.org/D77804