[llvm] 726d9f8 - [X86][MC] Avoid emitting incorrect warning for complex FMUL

[Phoebe Wang via llvm-commits]

Author: Phoebe Wang
Date: 2022-07-28T13:58:34+08:00
New Revision: 726d9f8e8c5369ece28058a014da860f65eee33c

URL: https://github.com/llvm/llvm-project/commit/726d9f8e8c5369ece28058a014da860f65eee33c
DIFF: https://github.com/llvm/llvm-project/commit/726d9f8e8c5369ece28058a014da860f65eee33c.diff

LOG: [X86][MC] Avoid emitting incorrect warning for complex FMUL

We will insert a new operand which is identical to the Dest for complex
FMUL with a mask. https://godbolt.org/z/eTEdnYv3q

Complex FMA and FMUL with maskz don't have this problem.

Reviewed By: LuoYuanke, skan

Differential Revision: https://reviews.llvm.org/D130638

Added: 
    

Modified: 
    llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
    llvm/test/MC/X86/avx512fp16.s

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 871b23f80efe7..d0a3a1827435c 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -3847,7 +3847,13 @@ bool X86AsmParser::validateInstruction(MCInst &Inst, const OperandVector &Ops) {
   } else if (isVFCMULCPH(Opcode) || isVFCMULCSH(Opcode) || isVFMULCPH(Opcode) ||
              isVFMULCSH(Opcode)) {
     unsigned Dest = Inst.getOperand(0).getReg();
-    for (unsigned i = 1; i < Inst.getNumOperands(); i++)
+    // The mask variants have 
diff erent operand list. Scan from the third
+    // operand to avoid emitting incorrect warning.
+    //    VFMULCPHZrr   Dest, Src1, Src2
+    //    VFMULCPHZrrk  Dest, Dest, Mask, Src1, Src2
+    //    VFMULCPHZrrkz Dest, Mask, Src1, Src2
+    for (unsigned i = TSFlags & X86II::EVEX_K ? 2 : 1;
+         i < Inst.getNumOperands(); i++)
       if (Inst.getOperand(i).isReg() && Dest == Inst.getOperand(i).getReg())
         return Warning(Ops[0]->getStartLoc(), "Destination register should be "
                                               "distinct from source registers");

diff  --git a/llvm/test/MC/X86/avx512fp16.s b/llvm/test/MC/X86/avx512fp16.s
index cc619d877d8a1..13eaa7de6a69b 100644
--- a/llvm/test/MC/X86/avx512fp16.s
+++ b/llvm/test/MC/X86/avx512fp16.s
@@ -1,4 +1,7 @@
 // RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding < %s  | FileCheck %s
+// RUN: llvm-mc -triple x86_64-unknown-unknown < %s 2>&1 | FileCheck %s --check-prefix=CHECK-NO-WARN
+
+// CHECK-NO-WARN-NOT: warning
 
 // CHECK: vmovsh %xmm28, %xmm29, %xmm30
 // CHECK: encoding: [0x62,0x05,0x16,0x00,0x10,0xf4]