[PATCH] D130560: [RISCV] Handle register spill in branch relaxation
luxufan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 27 22:58:23 PDT 2022
StephenFan added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:1077
+ if (!isInt<20>(EstimateFunctionSizeInBytes(MF, *TII))) {
+ int FI = MFI.CreateStackObject(RegInfo->getSpillSize(*RC),
+ RegInfo->getSpillAlign(*RC), false);
----------------
Actually, scavenging spill slots can be reused. But here we always create a scavenging spill slot even if there is already a scavenging spill slot.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D130560/new/
https://reviews.llvm.org/D130560
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