[PATCH] D130367: [AMDGPU] avoid blind converting to VALU REG_SEQUENCE and PHIs

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp:1042
+          }
+        if (J == I)
+          continue;
----------------
alex-t wrote:
> rampitec wrote:
> > Indention is off?
> Formatting is ok here.
> Closing brace at line 1041 matches with 'for' at line 1006.
> 'if' at line 1042 has the same indentation as 'if' at line 1005 that has no braces.
This is unreadable and misleading. Add the braces then. And maybe a blank line.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130367/new/

https://reviews.llvm.org/D130367