[PATCH] D130367: [AMDGPU] avoid blind converting to VALU REG_SEQUENCE and PHIs
Alexander via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 27 10:44:59 PDT 2022
alex-t marked an inline comment as done.
alex-t added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp:1042
+ }
+ if (J == I)
+ continue;
----------------
rampitec wrote:
> Indention is off?
Formatting is ok here.
Closing brace at line 1041 matches with 'for' at line 1006.
'if' at line 1042 has the same indentation as 'if' at line 1005 that has no braces.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D130367/new/
https://reviews.llvm.org/D130367
More information about the llvm-commits
mailing list