[PATCH] D130621: [RISCV] Add target feature to force-enable atomics

[Nikita Popov via Phabricator via llvm-commits]

nikic added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:414
     setMinCmpXchgSizeInBits(32);
+  } else if (Subtarget.hasForcedAtomics()) {
+    setMaxAtomicSizeInBitsSupported(Subtarget.is64Bit() ? 64 : 32);
----------------
reames wrote:
> What MinCmpXchgSizeInBits do you want for the forced atomics?  
> 
> Once you answer that, this code can probably be rearranged to have a common if body for both A and forced atomics.
> 
> Also, use XLenVT
I think we don't want a minimum for this case. It would save the need to support two `__sync_val_compare_and_swap` libcalls at the expense of generating more complex code for i8/i16 cmpxchg. Here's what the diff would look like: https://gist.github.com/nikic/9025e91bde139fbb75225f4fbd0539e9


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130621/new/

https://reviews.llvm.org/D130621