[PATCH] D130621: [RISCV] Add target feature to force 32-bit atomics

Jessica Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 27 03:48:17 PDT 2022


jrtc27 added a comment.

Why atomics-32 and not something that generalises to include 64-bit atomics on RV64?



================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoA.td:111
+let Predicates = [HasAtomicLdSt32] in {
+  defm : LdPat<atomic_load_8,  LB>;
+  defm : LdPat<atomic_load_16, LH>;
----------------
Don’t duplicate patterns


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130621/new/

https://reviews.llvm.org/D130621



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