[PATCH] D107279: [RISCV] Add test showing the current extern_weak lowering

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 updated this revision to Diff 447491.
jrtc27 added a comment.
Herald added subscribers: sunshaoce, pcwang-thead, eopXD, VincentWu, luke957, StephenFan, arichardson.
Herald added a project: All.

Rebased


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D107279/new/

https://reviews.llvm.org/D107279

Files:
  llvm/test/CodeGen/RISCV/codemodel-lowering.ll


Index: llvm/test/CodeGen/RISCV/codemodel-lowering.ll
===================================================================
--- llvm/test/CodeGen/RISCV/codemodel-lowering.ll
+++ llvm/test/CodeGen/RISCV/codemodel-lowering.ll
@@ -143,3 +143,24 @@
   %1 = fadd float %a, 1.0
   ret float %1
 }
+
+; Check lowering of extern_weaks
+ at W = extern_weak global i32
+
+define i32 @lower_extern_weak(i32 %a) nounwind {
+; RV32I-SMALL-LABEL: lower_extern_weak:
+; RV32I-SMALL:       # %bb.0:
+; RV32I-SMALL-NEXT:    lui a0, %hi(W)
+; RV32I-SMALL-NEXT:    lw a0, %lo(W)(a0)
+; RV32I-SMALL-NEXT:    ret
+;
+; RV32I-MEDIUM-LABEL: lower_extern_weak:
+; RV32I-MEDIUM:       # %bb.0:
+; RV32I-MEDIUM-NEXT:  .LBB4_1: # Label of block must be emitted
+; RV32I-MEDIUM-NEXT:    auipc a0, %pcrel_hi(W)
+; RV32I-MEDIUM-NEXT:    addi a0, a0, %pcrel_lo(.LBB4_1)
+; RV32I-MEDIUM-NEXT:    lw a0, 0(a0)
+; RV32I-MEDIUM-NEXT:    ret
+  %1 = load volatile i32, i32* @W
+  ret i32 %1
+}


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