[llvm] 0ccb6da - precommit update_mir_test_checks run for D130316 NFC
Nick Desaulniers via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 21 17:11:51 PDT 2022
Author: Nick Desaulniers
Date: 2022-07-21T17:10:53-07:00
New Revision: 0ccb6da725bad797f576713613f8368f7f52290c
URL: https://github.com/llvm/llvm-project/commit/0ccb6da725bad797f576713613f8368f7f52290c
DIFF: https://github.com/llvm/llvm-project/commit/0ccb6da725bad797f576713613f8368f7f52290c.diff
LOG: precommit update_mir_test_checks run for D130316 NFC
Added:
Modified:
llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/tail-dup-asm-goto.ll b/llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
index b3f9e3e8dc9ff..f4a81fe6576fb 100644
--- a/llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
+++ b/llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
@@ -8,33 +8,43 @@ declare dso_local void @foo()
define ptr @test1(ptr %arg1, ptr %arg2) {
; CHECK-LABEL: name: test1
; CHECK: bb.0.bb:
- ; CHECK: successors: %bb.1(0x50000000), %bb.2(0x30000000)
- ; CHECK: liveins: $rdi, $rsi
- ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
- ; CHECK: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
- ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s64) from %ir.arg1)
- ; CHECK: [[SUB64rr:%[0-9]+]]:gr64 = SUB64rr [[MOV64rm]], [[COPY]], implicit-def $eflags
- ; CHECK: JCC_1 %bb.2, 4, implicit $eflags
- ; CHECK: JMP_1 %bb.1
- ; CHECK: bb.1.bb100:
- ; CHECK: successors: %bb.3(0x80000000)
- ; CHECK: MOV64mi32 [[COPY1]], 1, $noreg, 0, $noreg, 0 :: (store (s64) into %ir.arg1)
- ; CHECK: JMP_1 %bb.3
- ; CHECK: bb.2.bb106:
- ; CHECK: successors: %bb.3(0x80000000)
- ; CHECK: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- ; CHECK: CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp
- ; CHECK: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- ; CHECK: bb.3.bb110:
- ; CHECK: successors: %bb.5(0x80000000), %bb.4(0x00000000)
- ; CHECK: [[PHI:%[0-9]+]]:gr64 = PHI [[COPY]], %bb.2, [[MOV64rm]], %bb.1
- ; CHECK: INLINEASM_BR &"#$0 $1 $2", 9 /* sideeffect mayload attdialect */, 13 /* imm */, 42, 13 /* imm */, 0, 13 /* imm */, blockaddress(@test1, %ir-block.bb17.i.i.i), 12 /* clobber */, implicit-def early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def early-clobber $eflags
- ; CHECK: JMP_1 %bb.5
- ; CHECK: bb.4.bb17.i.i.i (address-taken, inlineasm-br-indirect-target):
- ; CHECK: successors: %bb.5(0x80000000)
- ; CHECK: bb.5.kmem_cache_has_cpu_partial.exit:
- ; CHECK: $rax = COPY [[PHI]]
- ; CHECK: RET 0, $rax
+ ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
+ ; CHECK-NEXT: liveins: $rdi, $rsi
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rsi
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
+ ; CHECK-NEXT: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s64) from %ir.arg1)
+ ; CHECK-NEXT: [[SUB64rr:%[0-9]+]]:gr64 = SUB64rr [[MOV64rm]], [[COPY]], implicit-def $eflags
+ ; CHECK-NEXT: JCC_1 %bb.2, 4, implicit $eflags
+ ; CHECK-NEXT: JMP_1 %bb.1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1.bb100:
+ ; CHECK-NEXT: successors: %bb.3(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: MOV64mi32 [[COPY1]], 1, $noreg, 0, $noreg, 0 :: (store (s64) into %ir.arg1)
+ ; CHECK-NEXT: JMP_1 %bb.3
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2.bb106:
+ ; CHECK-NEXT: successors: %bb.3(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp
+ ; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.3.bb110:
+ ; CHECK-NEXT: successors: %bb.5(0x80000000), %bb.4(0x00000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[PHI:%[0-9]+]]:gr64 = PHI [[COPY]], %bb.2, [[MOV64rm]], %bb.1
+ ; CHECK-NEXT: INLINEASM_BR &"#$0 $1 $2", 9 /* sideeffect mayload attdialect */, 13 /* imm */, 42, 13 /* imm */, 0, 13 /* imm */, blockaddress(@test1, %ir-block.bb17.i.i.i), 12 /* clobber */, implicit-def early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def early-clobber $eflags
+ ; CHECK-NEXT: JMP_1 %bb.5
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.4.bb17.i.i.i (address-taken, inlineasm-br-indirect-target):
+ ; CHECK-NEXT: successors: %bb.5(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.5.kmem_cache_has_cpu_partial.exit:
+ ; CHECK-NEXT: $rax = COPY [[PHI]]
+ ; CHECK-NEXT: RET 0, $rax
bb:
%i28.i = load ptr, ptr %arg1, align 8
%if = icmp ne ptr %i28.i, %arg2
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