[llvm] 6746b23 - [RISCV] Add test cases for failure to use bexti for (setne (and X, 1<<C))

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2022-07-20T15:03:52-07:00
New Revision: 6746b2349c6be8d5becc87a2a825c1b26ac08d3c

URL: https://github.com/llvm/llvm-project/commit/6746b2349c6be8d5becc87a2a825c1b26ac08d3c
DIFF: https://github.com/llvm/llvm-project/commit/6746b2349c6be8d5becc87a2a825c1b26ac08d3c.diff

LOG: [RISCV] Add test cases for failure to use bexti for (setne (and X, 1<<C))

This will get converted to (srl (and X, 1<<C), C) which we need
to isel to bexti.

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/rv32zbs.ll
    llvm/test/CodeGen/RISCV/rv64zbs.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/RISCV/rv32zbs.ll b/llvm/test/CodeGen/RISCV/rv32zbs.ll
index c77d9c3c8b687..1d7b618bbde39 100644
--- a/llvm/test/CodeGen/RISCV/rv32zbs.ll
+++ b/llvm/test/CodeGen/RISCV/rv32zbs.ll
@@ -336,6 +336,31 @@ define i64 @bexti_i64(i64 %a) nounwind {
   ret i64 %and
 }
 
+define signext i32 @bexti_i32_cmp(i32 signext %a) nounwind {
+; CHECK-LABEL: bexti_i32_cmp:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    slli a0, a0, 26
+; CHECK-NEXT:    srli a0, a0, 31
+; CHECK-NEXT:    ret
+  %and = and i32 %a, 32
+  %cmp = icmp ne i32 %and, 0
+  %zext = zext i1 %cmp to i32
+  ret i32 %zext
+}
+
+define i64 @bexti_i64_cmp(i64 %a) nounwind {
+; CHECK-LABEL: bexti_i64_cmp:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    slli a0, a0, 26
+; CHECK-NEXT:    srli a0, a0, 31
+; CHECK-NEXT:    li a1, 0
+; CHECK-NEXT:    ret
+  %and = and i64 %a, 32
+  %cmp = icmp ne i64 %and, 0
+  %zext = zext i1 %cmp to i64
+  ret i64 %zext
+}
+
 define i32 @bclri_i32_10(i32 %a) nounwind {
 ; CHECK-LABEL: bclri_i32_10:
 ; CHECK:       # %bb.0:

diff  --git a/llvm/test/CodeGen/RISCV/rv64zbs.ll b/llvm/test/CodeGen/RISCV/rv64zbs.ll
index cbe3c04e24d82..dce206ba0c5f1 100644
--- a/llvm/test/CodeGen/RISCV/rv64zbs.ll
+++ b/llvm/test/CodeGen/RISCV/rv64zbs.ll
@@ -428,6 +428,30 @@ define i64 @bexti_i64(i64 %a) nounwind {
   ret i64 %and
 }
 
+define signext i32 @bexti_i32_cmp(i32 signext %a) nounwind {
+; CHECK-LABEL: bexti_i32_cmp:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    slli a0, a0, 58
+; CHECK-NEXT:    srli a0, a0, 63
+; CHECK-NEXT:    ret
+  %and = and i32 %a, 32
+  %cmp = icmp ne i32 %and, 0
+  %zext = zext i1 %cmp to i32
+  ret i32 %zext
+}
+
+define i64 @bexti_i64_cmp(i64 %a) nounwind {
+; CHECK-LABEL: bexti_i64_cmp:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    slli a0, a0, 58
+; CHECK-NEXT:    srli a0, a0, 63
+; CHECK-NEXT:    ret
+  %and = and i64 %a, 32
+  %cmp = icmp ne i64 %and, 0
+  %zext = zext i1 %cmp to i64
+  ret i64 %zext
+}
+
 define signext i32 @bclri_i32_10(i32 signext %a) nounwind {
 ; CHECK-LABEL: bclri_i32_10:
 ; CHECK:       # %bb.0: