[PATCH] D130099: [RISCV] Optimize (br_cc (and X, 0x80000000), 0, seteq, dest) on RV64

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 20 09:07:39 PDT 2022


craig.topper added a comment.

In D130099#3665426 <https://reviews.llvm.org/D130099#3665426>, @reames wrote:

> Can't we do something more general here using shifts?
>
> For one bit masks, can't we shift the desired bit to one end and then test?  For a left shift, this would be moving the desired bit to test into bit 64 (sign bit) and using the signed comparison as in this patch.  For a right shift, this would be moving the desired bit into bit 0, and testing against zero.  We do have a snez I believe.

Right shift doesn’t work without clearing the bits that are above the tested bit. But left shift would work.


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