[PATCH] D130013: [AArch64][SVE] Add DAG-Combine to push bitcasts from floating point loads after DUPLANE128
Matt Devereau via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 19 08:35:30 PDT 2022
MattDevereau marked an inline comment as not done.
MattDevereau added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:19217
+
+ SDValue Bitcast = Insert.getOperand(1);
+ SDValue Load = Bitcast.getOperand(0);
----------------
MattDevereau wrote:
> paulwalker-arm wrote:
> > You need to check this is in fact a `ISD::BITCAST` before accessing its operands.
> I'm confused as in the old patch we removed it: https://reviews.llvm.org/D129758?vs=on&id=444647#inline-1248238
Never mind, I read that wrong, sorry
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D130013/new/
https://reviews.llvm.org/D130013
More information about the llvm-commits
mailing list