[PATCH] D130013: [AArch64][SVE] Add DAG-Combine to push bitcasts from floating point loads after DUPLANE128

[Matt Devereau via Phabricator via llvm-commits]

MattDevereau added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:19217
+
+  SDValue Bitcast = Insert.getOperand(1);
+  SDValue Load = Bitcast.getOperand(0);
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paulwalker-arm wrote:
> You need to check this is in fact a `ISD::BITCAST` before accessing its operands.
I'm confused as in the old patch we removed it: https://reviews.llvm.org/D129758?vs=on&id=444647#inline-1248238


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Comment at: llvm/test/CodeGen/AArch64/sve-ld1r.ll:822-835
+define dso_local <vscale x 2 x double> @dupq_ld1rqd_f64() {
+; CHECK-LABEL: dupq_ld1rqd_f64:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    adrp x8, .LCPI61_0
+; CHECK-NEXT:    add x8, x8, :lo12:.LCPI61_0
+; CHECK-NEXT:    ptrue p0.d
+; CHECK-NEXT:    ld1rqd { z0.d }, p0/z, [x8]
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paulwalker-arm wrote:
> As per our conclusion on the precursor patch, these new tests don't offer any value?
Correct, i was waiting for the parent revision before update this.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130013/new/

https://reviews.llvm.org/D130013