[PATCH] D130075: [InstCombine] Try not to demand low order bits for Add

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

This is still WIP because I need to write a better test for it.

Related to D129844 <https://reviews.llvm.org/D129844>.



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Comment at: llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp:519-521
+    unsigned NTZ = (~DemandedMask & RHSKnown.Zero).countTrailingOnes();
+    APInt DemandedFromLHS = DemandedFromOps;
+    DemandedFromLHS.clearLowBits(NTZ);
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This is the important change. The rest is just refactoring.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130075/new/

https://reviews.llvm.org/D130075