[PATCH] D129537: [X86][DAGISel] Combine select vXi64 with AVX512 target

LuoYuanke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 18 22:37:03 PDT 2022


LuoYuanke added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:44346
+
+  if (!CondVT.isVector() || CondVT.getVectorElementType() != MVT::i1)
+    return SDValue();
----------------
RKSimon wrote:
> Check if N->getOpcode() == ISD::VSELECT
Is it possible that CondVT is not vXi1 for ISD::VSELECT? I ask the question becasue the comments for ISD::VSELECT says "targets may change the condition type". 

  /// At first, the VSELECT condition is of vXi1 type. Later, targets may
  /// change the condition type in order to match the VSELECT node using a
  /// pattern. The condition follows the BooleanContent format of the target.


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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129537/new/

https://reviews.llvm.org/D129537



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