[PATCH] D129537: [X86][DAGISel] Combine select vXi64 with AVX512 target

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 18 13:20:22 PDT 2022


RKSimon added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:44346
+
+  if (!CondVT.isVector() || CondVT.getVectorElementType() != MVT::i1)
+    return SDValue();
----------------
Check if N->getOpcode() == ISD::VSELECT


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:44350
+    return SDValue();
+  if (!dyn_cast<ConstantSDNode>(Cond.getOperand(0)))
+    return SDValue();
----------------
```
auto *ConstCond = dyn_cast<ConstantSDNode>(Cond.getOperand(0));
if (!ConstCond)
  return SDValue();
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129537/new/

https://reviews.llvm.org/D129537



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