[PATCH] D129727: [ARM64EC 11/?] Add support for lowering variadic indirect calls.

[chenglin.bi via Phabricator via llvm-commits]

bcl5980 added a comment.

When I trying to move the memcpy to SelectionDag AArch64TargetLowering::LowerCall, there are two issues I can't fix:

1. Load address for __os_arm64x_dispatch_call_no_redirect is after memory copy in IR version. But if we copy memory in LowerCall the load is before memory copy. It cause one more register usage.
2. 32 bytes for register store should be the real bottom on the stack but when I move memory copy into LowerCall , the dynamic allocation is always the real bottom on the stack.

@efriedma Do you have any idea to fix them?


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  https://reviews.llvm.org/D129727/new/

https://reviews.llvm.org/D129727