[PATCH] D129641: [DAG] PromoteIntRes_BUILD_VECTOR - extend constant boolean vectors according to target BooleanContents

[ChenZheng via Phabricator via llvm-commits]

shchenz added inline comments.


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Comment at: llvm/test/CodeGen/PowerPC/vec-select.ll:56
 
-; Not valid to emit XXSEL for this illegal type.
+; vXi1 constants are sign-extended to preserve XXSEL pattern.
 define dso_local <4 x i1> @test5(<4 x i1> %a, <4 x i1> %b, <4 x i1> %c) {
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RKSimon wrote:
> RKSimon wrote:
> > @nemanjai Please can you confirm if you intended to avoid the XXSEL pattern because <i1 -1, i1 -1, i1 -1, i1 -1> would extend to <i32 1, i32 1, i32 1, i32 1> or some other reason?
> @shchenz I'm not sure if @nemanjai is around, do you happen to know any background to this please?
To me, this looks like improvement for `4 x i1` type. We cannot guarantee the higher 31 bits even before this patch.


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  https://reviews.llvm.org/D129641/new/

https://reviews.llvm.org/D129641