[PATCH] D129989: [AArch64][SVE] Recognize splats of f16 -0.0 for fadda

Mon Jul 18 04:31:55 PDT 2022

dmgreen added inline comments.

================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:1129
   if (Subtarget->hasSVE()) {
+    setOperationAction(ISD::ConstantFP, MVT::f16, Legal);
+
----------------
I think if this is added we need to add extra lowering for FP16 constants of any kind, and it probably shouldn't be guarded by hasSVE but done in general.

Any i16 constant can be materialized with a single mov, so the worst case is that plus a gpr->fpr, which is likely better than the load we currently produce.
https://godbolt.org/z/r59arn5bq

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129989/new/

https://reviews.llvm.org/D129989