[PATCH] D129980: [RISCV] Optimize (seteq (i64 (and X, 0xffffffff)), C1)

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jul 17 20:22:47 PDT 2022


craig.topper added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/i64-icmp.ll:693
+; RV64I-NEXT:    sext.w a0, a0
 ; RV64I-NEXT:    addi a0, a0, -123
 ; RV64I-NEXT:    seqz a0, a0
----------------
I think we can use addiw here to avoid the sext.w?


================
Comment at: llvm/test/CodeGen/RISCV/i64-icmp.ll:708
+; RV64I-NEXT:    addiw a1, a1, -529
 ; RV64I-NEXT:    xor a0, a0, a1
 ; RV64I-NEXT:    seqz a0, a0
----------------
I think we can use subw instead of xor to avoid the sext.w


================
Comment at: llvm/test/CodeGen/RISCV/i64-icmp.ll:733
+; RV64I-NEXT:    sext.w a0, a0
+; RV64I-NEXT:    addi a0, a0, 2
 ; RV64I-NEXT:    snez a0, a0
----------------
I think we can use addiw to avoid the sext.w


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129980/new/

https://reviews.llvm.org/D129980



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