[PATCH] D129933: [DAG] SimplifyDemandedBits - relax "xor (X >> ShiftC), XorC --> (not X) >> ShiftC" to match only demanded bits

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: dmgreen, efriedma, sdardis, craig.topper, pengfei, spatel, deadalnix.
Herald added subscribers: jsji, StephenFan, frasercrmck, luismarques, apazos, sameer.abuasal, steven.zhang, s.egerton, Jim, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, atanasyan, edward-jones, zzheng, jrtc27, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya.
Herald added a project: All.
RKSimon requested review of this revision.
Herald added subscribers: pcwang-thead, MaskRay.
Herald added a project: LLVM.

The "xor (X >> ShiftC), XorC --> (not X) >> ShiftC" fold is currently limited to the XOR mask being a shifted all-bits mask, but we can relax this to only need to match under the demanded bits.

This helps expose more bit extraction/clearing patterns and fixes the PowerPC testCompares*.ll regressions from D127115 <https://reviews.llvm.org/D127115>

Alive2: https://alive2.llvm.org/ce/z/fl7T7K


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D129933

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/AArch64/optimize-imm.ll
  llvm/test/CodeGen/AArch64/selectcc-to-shiftand.ll
  llvm/test/CodeGen/ARM/pr36577.ll
  llvm/test/CodeGen/Mips/bittest.ll
  llvm/test/CodeGen/RISCV/bittest.ll
  llvm/test/CodeGen/X86/speculative-load-hardening.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D129933.445229.patch
Type: text/x-patch
Size: 15470 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220716/9950c782/attachment.bin>