[PATCH] D129557: [AMDGPU] Improve liveness copying in si-optimize-exec-masking-pre-ra

[Carl Ritson via Phabricator via llvm-commits]

critson marked 4 inline comments as done.
critson added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp:227
+      assert(SelLI->getSegmentContaining(SelIdx.getRegSlot()) &&
+             "No live interval segment covering defintion?");
+      for (auto I = SelLI->FindSegmentContaining(SelIdx.getRegSlot());
----------------
arsenm wrote:
> Typo defintion. The assert seems a bit redundant with the FindSegmentContaining below
Fixed the typo.
I would prefer to the keep the assertion because while the code won't fail without segment, it suggest something is wrong which will impact code gen.


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Comment at: llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-alloc-failure.mir:26
+
+    %3:sgpr_64(p4) = COPY $sgpr4_sgpr5
+    %4:vgpr_32 = COPY $vgpr0
----------------
arsenm wrote:
> Should drop the register types
I assume you mean the variable specification (p3) or (p4), I have removed these.
The register type information is required on most instructions for code gen.


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https://reviews.llvm.org/D129557