[PATCH] D123496: [RISCV] Add Stackmap/Statepoint/Patchpoint support without targets
Sacha Coppey via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 14 10:47:43 PDT 2022
Zeavee added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp:16
#include "MCTargetDesc/RISCVMCExpr.h"
+#include "MCTargetDesc/RISCVMatInt.h"
#include "MCTargetDesc/RISCVTargetStreamer.h"
----------------
craig.topper wrote:
> Is this used? I see the discussion about using RISCVMatInt::generateInstSeq but I don't see any code.
It will be used in the next patch with targets, but I can remove this import in this one, I missed it.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:998
+
+ if (Opcode == TargetOpcode::STACKMAP) {
+ // The upper bound for a stackmap intrinsic is the full length of its shadow
----------------
craig.topper wrote:
> Use a switch?
Sure!
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D123496/new/
https://reviews.llvm.org/D123496
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