[PATCH] D129637: [AMDGPU][MC][GFX11] Correct disassembly of *_e64_dpp opcodes which support op_sel

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

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These opcodes cannot be disassembled because `op_sel` operand is missing - it must be added manually.
See bug 56512 <https://github.com/llvm/llvm-project/issues/56512> for detailed issue analysis.

A similar problem is being addressed in https://reviews.llvm.org/D129084, but it affects different opcodes.


https://reviews.llvm.org/D129637

Files:
  llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
  llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
  llvm/lib/Target/AMDGPU/VOPInstructions.td
  llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
  llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt

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