[llvm] 8eaf00e - [TargetLowering][RISCV] Make expandCTLZ work for non-power of 2 types.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 12 11:36:59 PDT 2022


Author: Craig Topper
Date: 2022-07-12T11:36:37-07:00
New Revision: 8eaf00e04dba1b98acf8031b61d9488387a1066e

URL: https://github.com/llvm/llvm-project/commit/8eaf00e04dba1b98acf8031b61d9488387a1066e
DIFF: https://github.com/llvm/llvm-project/commit/8eaf00e04dba1b98acf8031b61d9488387a1066e.diff

LOG: [TargetLowering][RISCV] Make expandCTLZ work for non-power of 2 types.

To convert CTLZ to popcount we do

x = x | (x >> 1);
x = x | (x >> 2);
...
x = x | (x >>16);
x = x | (x >>32); // for 64-bit input
return popcount(~x);

This smears the most significant set bit across all of the bits
below it then inverts the remaining 0s and does a population count.

To support non-power of 2 types, the last shift amount must be
more than half of the size of the type. For i15, the last shift
was previously a shift by 4, with this patch we add another shift
of 8.

Fixes PR56457.

Differential Revision: https://reviews.llvm.org/D129431

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    llvm/test/CodeGen/RISCV/pr56457.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index d08b195ea239e..5225d028c103c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -7850,7 +7850,7 @@ SDValue TargetLowering::expandCTLZ(SDNode *Node, SelectionDAG &DAG) const {
   // return popcount(~x);
   //
   // Ref: "Hacker's Delight" by Henry Warren
-  for (unsigned i = 0; (1U << i) <= (NumBitsPerElt / 2); ++i) {
+  for (unsigned i = 0; (1U << i) < NumBitsPerElt; ++i) {
     SDValue Tmp = DAG.getConstant(1ULL << i, dl, ShVT);
     Op = DAG.getNode(ISD::OR, dl, VT, Op,
                      DAG.getNode(ISD::SRL, dl, VT, Op, Tmp));

diff  --git a/llvm/test/CodeGen/RISCV/pr56457.ll b/llvm/test/CodeGen/RISCV/pr56457.ll
index 0877dd668f8a7..1858241d711f8 100644
--- a/llvm/test/CodeGen/RISCV/pr56457.ll
+++ b/llvm/test/CodeGen/RISCV/pr56457.ll
@@ -18,6 +18,9 @@ define i15 @foo(i15 %x) nounwind {
 ; CHECK-NEXT:    slli a1, a0, 49
 ; CHECK-NEXT:    srli a1, a1, 53
 ; CHECK-NEXT:    or a0, a0, a1
+; CHECK-NEXT:    slli a1, a0, 49
+; CHECK-NEXT:    srli a1, a1, 57
+; CHECK-NEXT:    or a0, a0, a1
 ; CHECK-NEXT:    not a0, a0
 ; CHECK-NEXT:    slli a0, a0, 49
 ; CHECK-NEXT:    srli a0, a0, 49


        


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