[PATCH] D129381: [AMDGPU][CodeGen] Support (register + immediate) SMRD offsets.

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

> The reason seems to be that with this change in place we generate more spills, which in turn is caused by reduced number of used registers as determined by AMDGPUResourceUsageAnalysis::analyzeResourceUsage()

I don't understand this. I thought AMDGPUResourceUsageAnalysis ran after regalloc so I don't see how it can affect spilling.


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  https://reviews.llvm.org/D129381/new/

https://reviews.llvm.org/D129381