[PATCH] D129207: [X86] isTargetShuffleEquivalent - attempt to match SM_SentinelZero shuffle mask elements using known bits
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 11 06:20:24 PDT 2022
spatel added inline comments.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:11818
continue;
+ if (MaskIdx == SM_SentinelZero && 0 <= ExpectedIdx) {
+ // If we need this expected index to be a zero element, then update the
----------------
What do you think about adding a clause above this and below the first clause like:
// If the mask is more defined than expected, the shuffles are not the same.
if (ExpectedIdx == SM_SentinelUndef)
return false;
I think that would then allow simplifying the later checks (converting to asserts).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D129207/new/
https://reviews.llvm.org/D129207
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