[PATCH] D129207: [X86] isTargetShuffleEquivalent - attempt to match SM_SentinelZero shuffle mask elements using known bits

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 11 03:06:44 PDT 2022

Previous message: [PATCH] D129095: [AMDGPU][CodeGen] Match complex register SMRD offsets.
Next message: [PATCH] D129207: [X86] isTargetShuffleEquivalent - attempt to match SM_SentinelZero shuffle mask elements using known bits
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

RKSimon added a comment.

ping - any objections?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129207/new/

https://reviews.llvm.org/D129207

Previous message: [PATCH] D129095: [AMDGPU][CodeGen] Match complex register SMRD offsets.
Next message: [PATCH] D129207: [X86] isTargetShuffleEquivalent - attempt to match SM_SentinelZero shuffle mask elements using known bits
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list