[PATCH] D129073: [AMDGPU] Combine s_or_saveexec, s_xor instructions.

[Sebastian Neubauer via Phabricator via llvm-commits]

sebastian-ne added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp:735-736
+// Replace occurences of
+// s_or_saveexec s_i, s_i
+// s_xor exec, exec, s_i
+// with
----------------
I guess this also works if the input register is not the same as the output register?
```
s_or_saveexec s_o, s_i
s_xor exec, exec, s_o
```


================
Comment at: llvm/test/CodeGen/AMDGPU/s_or_saveexec_xor_combine.mir:98
+    renamable $sgpr1 = S_MOV_B32 renamable $sgpr0
+    $exec_lo = S_XOR_B32 $exec_lo, renamable $sgpr1, implicit-def $scc
----------------
Can you add a test where `S_OR_SAVEEXEC` is the last instruction?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D129073/new/

https://reviews.llvm.org/D129073