[PATCH] D128631: [AArch64] Initial sched model for Neoverse N2

[Cullen Rhodes via Phabricator via llvm-commits]

c-rhodes added a comment.

In D128631#3635085 <https://reviews.llvm.org/D128631#3635085>, @dmgreen wrote:

> Thanks LGTM
>
>> The one reg variant of EXTR (both input registers are the same, can’t be modelled)
>
> It may be possible with a SchedulePredicate, but I think it's fairly minor. This patch is looking good.

First I've heard of SchedPredicate, good to know. And thanks for reviewing Dave, appreciate it.


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