[PATCH] D128631: [AArch64] Initial sched model for Neoverse N2

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 7 03:10:34 PDT 2022


dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.

Thanks LGTM

> The one reg variant of EXTR (both input registers are the same, can’t be modelled)

It may be possible with a SchedulePredicate, but I think it's fairly minor. This patch is looking good.


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