[llvm] b484cbb - [IndVars] Regenerate test checks (NFC)

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2022-07-06T17:13:28+02:00
New Revision: b484cbbc682ca5a06c211f36a30eda035bb4632c

URL: https://github.com/llvm/llvm-project/commit/b484cbbc682ca5a06c211f36a30eda035bb4632c
DIFF: https://github.com/llvm/llvm-project/commit/b484cbbc682ca5a06c211f36a30eda035bb4632c.diff

LOG: [IndVars] Regenerate test checks (NFC)

Added: 
    

Modified: 
    llvm/test/Transforms/IndVarSimplify/pr22222.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/IndVarSimplify/pr22222.ll b/llvm/test/Transforms/IndVarSimplify/pr22222.ll
index d1f04906ae4ac..aefd8c6ed382b 100644
--- a/llvm/test/Transforms/IndVarSimplify/pr22222.ll
+++ b/llvm/test/Transforms/IndVarSimplify/pr22222.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -indvars -S < %s | FileCheck %s
 
 @b = common global i32 0, align 4
@@ -8,6 +9,35 @@ declare void @abort() #1
 
 ; Function Attrs: nounwind ssp uwtable
 define i32 @main() {
+; CHECK-LABEL: @main(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[A_PROMOTED13:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT:    br label [[FOR_COND1_PREHEADER:%.*]]
+; CHECK:       for.cond1.preheader:
+; CHECK-NEXT:    [[OR_LCSSA14:%.*]] = phi i32 [ [[A_PROMOTED13]], [[ENTRY:%.*]] ], [ [[OR_LCSSA:%.*]], [[FOR_END:%.*]] ]
+; CHECK-NEXT:    [[D_010:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ 0, [[FOR_END]] ]
+; CHECK-NEXT:    br label [[FOR_BODY3:%.*]]
+; CHECK:       for.body3:
+; CHECK-NEXT:    [[INC12:%.*]] = phi i32 [ 0, [[FOR_COND1_PREHEADER]] ], [ [[INC:%.*]], [[FOR_BODY3]] ]
+; CHECK-NEXT:    [[OR11:%.*]] = phi i32 [ [[OR_LCSSA14]], [[FOR_COND1_PREHEADER]] ], [ [[OR:%.*]], [[FOR_BODY3]] ]
+; CHECK-NEXT:    [[ADD:%.*]] = sub i32 [[INC12]], [[D_010]]
+; CHECK-NEXT:    [[OR]] = or i32 [[OR11]], [[ADD]]
+; CHECK-NEXT:    [[INC]] = add nuw nsw i32 [[INC12]], 1
+; CHECK-NEXT:    br i1 false, label [[FOR_BODY3]], label [[FOR_END]]
+; CHECK:       for.end:
+; CHECK-NEXT:    [[OR_LCSSA]] = phi i32 [ [[OR]], [[FOR_BODY3]] ]
+; CHECK-NEXT:    br i1 false, label [[FOR_COND1_PREHEADER]], label [[FOR_END6:%.*]]
+; CHECK:       for.end6:
+; CHECK-NEXT:    [[OR_LCSSA_LCSSA:%.*]] = phi i32 [ [[OR_LCSSA]], [[FOR_END]] ]
+; CHECK-NEXT:    store i32 [[OR_LCSSA_LCSSA]], i32* @a, align 4
+; CHECK-NEXT:    [[CMP7:%.*]] = icmp eq i32 [[OR_LCSSA_LCSSA]], -1
+; CHECK-NEXT:    br i1 [[CMP7]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
+; CHECK:       if.then:
+; CHECK-NEXT:    tail call void @abort()
+; CHECK-NEXT:    unreachable
+; CHECK:       if.end:
+; CHECK-NEXT:    ret i32 0
+;
 entry:
   %a.promoted13 = load i32, i32* @a, align 4
   br label %for.cond1.preheader
@@ -20,8 +50,6 @@ for.cond1.preheader:                              ; preds = %entry, %for.end
 for.body3:                                        ; preds = %for.cond1.preheader, %for.body3
   %inc12 = phi i32 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
   %or11 = phi i32 [ %or.lcssa14, %for.cond1.preheader ], [ %or, %for.body3 ]
-; CHECK-NOT: sub nuw i32 %inc12, %d.010
-; CHECK: sub i32 %inc12, %d.010
   %add = sub i32 %inc12, %d.010
   %or = or i32 %or11, %add
   %inc = add i32 %inc12, 1