[PATCH] D129208: [MachineVerifier] Try harder to verify LiveIntervals
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 6 07:59:59 PDT 2022
foad created this revision.
Herald added subscribers: kosarev, kerbowa, hiraditya, tpr, jvesely.
Herald added a project: All.
foad requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
Verify the LiveIntervals analysis after a pass that claims to preserve
it, even if there are no further passes (apart from the verifier itself)
that would use the analysis.
FIXME: Hexagon tests fail with:
- Bad machine code: Multiple connected components in live interval ***
after Hexagon Expand Condsets.
FIXME: CodeGen/AMDGPU/spill-before-exec.mir fails with:
- Bad machine code: Multiple connected components in live interval ***
after Greedy Register Allocator.
FIXME: Other AMDGPU tests fail with
- Bad machine code: Multiple connected components in live interval ***
after SI optimize exec mask operations pre-RA.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D129208
Files:
llvm/lib/CodeGen/MachineVerifier.cpp
llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
Index: llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
===================================================================
--- llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
+++ llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
@@ -30,8 +30,8 @@
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], undef %1:sreg_64, implicit-def dead $scc
- ; GCN-NEXT: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[S_AND_B64_]], [[COPY]], implicit-def dead $scc
- ; GCN-NEXT: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
+ ; GCN-NEXT: dead %0:sreg_64 = S_XOR_B64 [[S_AND_B64_]], [[COPY]], implicit-def dead $scc
+ ; GCN-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]]
; GCN-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
; GCN-NEXT: S_BRANCH %bb.1
; GCN-NEXT: {{ $}}
@@ -71,7 +71,7 @@
; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
; GCN-NEXT: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY2]], implicit-def dead $scc
- ; GCN-NEXT: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
+ ; GCN-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]]
; GCN-NEXT: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_]], implicit $exec
; GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
; GCN-NEXT: S_BRANCH %bb.2
@@ -120,7 +120,7 @@
; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
; GCN-NEXT: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY2]], implicit-def dead $scc
- ; GCN-NEXT: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
+ ; GCN-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]]
; GCN-NEXT: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_]], implicit $exec
; GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
; GCN-NEXT: S_BRANCH %bb.2
@@ -182,7 +182,7 @@
; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
; GCN-NEXT: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY2]], implicit-def dead $scc
- ; GCN-NEXT: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
+ ; GCN-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]]
; GCN-NEXT: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_]], implicit $exec
; GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
; GCN-NEXT: S_BRANCH %bb.2
@@ -245,7 +245,7 @@
; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
; GCN-NEXT: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY2]], implicit-def dead $scc
- ; GCN-NEXT: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
+ ; GCN-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]]
; GCN-NEXT: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_]], implicit $exec
; GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
; GCN-NEXT: S_BRANCH %bb.2
@@ -305,7 +305,7 @@
; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
; GCN-NEXT: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY2]], implicit-def dead $scc
- ; GCN-NEXT: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
+ ; GCN-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]]
; GCN-NEXT: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_]], implicit $exec
; GCN-NEXT: S_CBRANCH_EXECZ %bb.1, implicit $exec
; GCN-NEXT: S_BRANCH %bb.2
@@ -383,7 +383,7 @@
; GCN-NEXT: [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_EQ_U32_e64_1]], implicit-def dead $scc
; GCN-NEXT: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY4]], implicit-def dead $scc
- ; GCN-NEXT: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
+ ; GCN-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]]
; GCN-NEXT: dead %8:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_]], implicit $exec
; GCN-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
; GCN-NEXT: {{ $}}
Index: llvm/lib/CodeGen/MachineVerifier.cpp
===================================================================
--- llvm/lib/CodeGen/MachineVerifier.cpp
+++ llvm/lib/CodeGen/MachineVerifier.cpp
@@ -293,6 +293,7 @@
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
+ AU.addUsedIfAvailable<LiveIntervals>();
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
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