[PATCH] D129037: [globalisel] Select register bank for DBG_VALUE

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp:730
+            continue;
+          // If there is physical register or virutal register that has been
+          // assigned to a register class, ignore debug info.
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Typo virutal


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Comment at: llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp:734
+          if (!Ty.isValid()) {
+            Ignore = true;
+            break;
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I wouldn't assume if one operand doesn't need assignment, then none do. Treat each operand individually


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Comment at: llvm/test/CodeGen/AArch64/GlobalISel/select-hint.mir:18-20
-    ; CHECK: %copy:gpr32all = COPY $w0
-    ; CHECK: $w1 = COPY %copy
-    ; CHECK: RET_ReallyLR implicit $w1
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These baseline check updates should be pre-committed


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129037/new/

https://reviews.llvm.org/D129037