[PATCH] D129086: [NFC][AMDGPU] Cleanup the SIOptimizeExecMasking pass.

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp:55
 
+static MCRegister getExecByWaveMode(const GCNSubtarget &ST) {
+  return ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
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foad wrote:
> Maybe add a new SIRegisterInfo::getEXEC, similar to the existing SIRegisterInfo::getVCC?
We talked about that a bit offline. I'm partial to having a "LaneMaskConstants" helper that gives access to a whole suite of wave-size dependent constants, i.e. physical register constants but also for the related opcodes.


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  https://reviews.llvm.org/D129086/new/

https://reviews.llvm.org/D129086