[PATCH] D120481: [AArch64] Try to re-use extended operand for SETCC with v16i8 operands.

[Florian Hahn via Phabricator via llvm-commits]

fhahn updated this revision to Diff 442032.
fhahn added a comment.

Update to lift restrictions on specific vector types.

In D120481#3366872 <https://reviews.llvm.org/D120481#3366872>, @dmgreen wrote:

>> Thanks for taking a look! Agreed that it will be helpful for a couple of other type combinations. But maybe the generalization should be done as follow-ups?
>
> Any reason to do that in a followup, as opposed to doing it here?

Mostly time constraints :)

I finally had some time to generalize this to support vector types in general


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120481/new/

https://reviews.llvm.org/D120481

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/vselect-ext.ll

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