[PATCH] D128836: [AMDGPU][GlobalISel] Support register offsets for SMRDs.

[Ivan Kosarev via Phabricator via llvm-commits]

kosarev updated this revision to Diff 441413.
kosarev added a comment.

Added an MIR instruction selection test and changed the if () condition
as suggested.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128836/new/

https://reviews.llvm.org/D128836

Files:
  llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
  llvm/test/CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll

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