[PATCH] D128570: [ISel] Round down mask bit when merge undef(s) for DAG combine
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 30 02:20:05 PDT 2022
RKSimon accepted this revision.
RKSimon added a comment.
Please pre-commit fshl-splat-undef.ll with current trunk codegen so that the patch commit shows the codegen change.
LGTM with a few minors
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Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:2723
+ // We can not convert t2 to {i64 undef, i64 undef}
+ UndefElts |= APIntOps::ScaleBitMask(SubUndefElts, NumElts, true);
}
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xiangzhangllvm wrote:
> RKSimon wrote:
> > I regret using the term 'UndefElts' - what I meant was that these elements shouldn't be trusted.
> : ) This is useful for undef optmization.
> So In this case (the lit test I write) the UndefElts is mainly used for undef propagation. Now we give out a choose to select MatchAllBits or MatchAnyBits for it.
> For BitCast, I think we should Conservatively use MatchAllBits.
/*MatchAllBits=*/true
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Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:2722
+
+ // Here we can't do "OR" operation merge for undef bits.
+ // Because some operation only use part value of the source.
----------------
OR -> MatchAnyBits
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Comment at: llvm/test/CodeGen/X86/fshl-splat-undef.ll:44
+; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
+declare <8 x i64> @llvm.fshl.v8i64(<8 x i64>, <8 x i64>, <8 x i64>) #0
+
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remove the function attrs and the #0 ?
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Comment at: llvm/test/CodeGen/X86/fshl-splat-undef.ll:46
+
+attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
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remove this?
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https://reviews.llvm.org/D128570/new/
https://reviews.llvm.org/D128570
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