[PATCH] D124564: [MachineCombiner, AArch64] Add a new pattern A-(B+C) => (A-B)-C to reduce latency

[Guozhi Wei via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGddc9e8861ccf: [MachineCombiner, AArch64] Add a new pattern A-(B+C) => (A-B)-C to reduce… (authored by Carrot).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124564/new/

https://reviews.llvm.org/D124564

Files:
  llvm/include/llvm/CodeGen/MachineCombinerPattern.h
  llvm/lib/CodeGen/MachineCombiner.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/test/CodeGen/AArch64/machine-combiner-subadd.ll
  llvm/test/CodeGen/AArch64/machine-combiner-subadd2.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D124564.440774.patch
Type: text/x-patch
Size: 16065 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220628/099ed95f/attachment.bin>