[PATCH] D128758: [RISCV] Refine known bits for READ_VLENB

[Philip Reames via Phabricator via llvm-commits]

reames updated this revision to Diff 440767.
reames added a comment.

Update per review comments.

Took a closer look, pretty sure the MinVLen of zero case is impossible.  We've had tripped the assert in vscale lowering first.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128758/new/

https://reviews.llvm.org/D128758

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i64.ll

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